[simpits-tech] MCC838 - Obscure decade counter chip
alex
alex at flyinglow.ca
Thu Mar 20 11:24:33 PDT 2008
Alex
http://www.flyinglow.ca
(Missed the group on my reply - not sure if this might benefit anyone else)
> -------Original Message-------
> From: Alan Murray <realclassclown at yahoo.com>
> Try putting a count on the chip (say 101), then remove
> the clock leaving the count static..next apply a LOW
> to the reset line without going through the NAND (take
> measure of output) then send the reset high again
> (take measure again)...do you end up with 101? I'm
> wondering if CD turns out to be an inhibit line of
> some kind. Count inhibit (maybe), output inhibit (no
> mention of tri-state)...
Ok. Will try that this weekend (schedule it too full to look at it tonight).
> Something about it doesn't make sense..how do you have
> the presets (SD1 etc.) configured?
I will have to double check, but I believe I have the presets set High (or they may be open - I could be wrong, but my gut feeling is that it didn't seem to matter).
> Motorola scrapped these things for a reason...;)
> How many do you have?
4 or 5. 2 are wired in already as they work for counting to 10 (0-9). The other 2 will only be used if I can figure out how to change the count. I actually have a lead on a bunch of free 7490's, so this may turn out to be an academic excercise.
> I wonder if there is a timing issue, something with
> propagation delay through the NAND while the clock
> triggers...you might try gating the outputs through
> flip-flops to align the clock edge with the input
> edge..your count may go off by one cycle or may synch
> but you would learn something either way.
Thanks for the tips.
> Good luck,
> Alan
>
>
> --- alex <alex at flyinglow.ca> wrote:
>
> > > -------Original Message-------
> > > From: Alan Murray <realclassclown at yahoo.com>
> >
> > > A proper truth table in the Motorola
> > documentation
> > > would really help.
> >
> > You're not kidding.
> >
> > > Specifically the Q4(not) ties back
> > > to the second gate input. When your reset drives
> > that
> > > high, the 2nd gate (essentially a NOR) correctly
> > > drives Q2 and subsequently Q3 low which gives you
> > the
> > > output you are getting...
> >
> > > What does the counter do without the NAND gate in
> > the
> > > circuit? Same thing right?
> >
> > Actually, no. If the Cd line is left High (No NAND
> > gate), then Q4-Q1 counts 0000, 0001, 0010... 1000,
> > 1001 (0-9). And in 2 places where I need the full
> > decade counter this configuration is currently
> > working as I need.
> >
> > Somewhere I found a snipit of text (buried in a
> > patent application I believe), that claims that if
> > SD4-SD1 are high, then driving CD High to Low should
> > reset the counter. If CD is Low, then driving any of
> > SD4-SD1 High to Low will cause the corresponding
> > Q4-Q1 to go High. But without the proper truth table
> > even better verbage from Motorola, this little
> > critter is turning out to be quite the little black
> > box.
> >
> > Alex
> >
>
>
>
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